1. Field of the Invention
The present invention relates to a system and method for interfacing an analog joystick with a digital computer. In particular, the present invention relates to a multiple mode joystick interface for providing an interface with digital characteristics to an analog joystick.
2. Description of Background Art
Many users rely upon electronic computer peripherals as input devices for computer software applications. For example, with regard to word processing software, a conventional keyboard often is used to input text data. In the operation of a graphic design program, a computer mouse or a writing tablet is used to input graphics. With game software, a joystick system usually is used to input two-dimensional positional movement.
FIG. 1 illustrates a conventional joystick system 100 for translating these two-dimensional positional movements into digital data. The joystick system 100 includes two analog joysticks 105a and 105b, an analog joystick interface 102 and a host 180. For simplicity, however, only analog joystick 105a will be discussed in detail. Those skilled in the art will recognize that analog joystick 105b operates in a similar fashion as analog joystick 105a.
The analog joystick 105a includes a positional grip 103, a first potentiometer 107 and a second potentiometer 109. The positional grip 103 pivots within a two-dimensional plane having an X-axis and a Y-axis. The first potentiometer 107 is physically coupled to the X-axis of the positional grip 103. The second potentiometer 109 is physically coupled to the Y-axis of the positional grip 103. Depending upon the direction a user moves the positional grip 103 within this two-dimensional plane, the positional grip 103 alters the resistance levels of either the first potentiometer 107, the second potentiometer 107 or both. For example, by moving the positional grip 103 along the X-axis to the left of the user, the resistance value of the first potentiometer 107 increases. If the positional grip 103 is moved along the X-axis to the right of the user, the resistance value of the first potentiometer 107 decreases. The second potentiometer 109 has a similar proportional relationship to the movements of the positional grip 103 along the Y-axis.
The analog joystick interface 102 includes four charging circuits 101a-d and a positional marker register 160. Each of the charging circuit 101a-d includes an input and an output. The input of the charging circuit (X1) 101a for the X-axis of the first analog joystick 105a is electrically coupled to the first potentiometer 107. The input of charging circuit (Y1) 101b for the Y-axis of the first analog joystick 105a is electrically coupled to the second potentiometer 109. To avoid unnecessary repetition, the charging circuit 101a for the X-axis of the analog joystick 105a will be the focus of the remaining discussion. Those skilled in the art will recognize that charging circuits 101b-101d operate in a similar fashion as charging circuit 101a operates with regard to the X-axis of the first analog joystick 105a.
Charging circuit 101a includes a charger 110, a comparator 120 and a reference circuit 115. The charger 110, which is a capacitor, includes a first input, a second input, and a first output. The first input of the charger 110 is electrically coupled to the first potentiometer 107, thereby creating a conventional resistor/capacitor ("RC") circuit having a conventional variable charging characteristic. As the resistance of the first potentiometer 107 is varied, the voltage V.sub.p across the first potentiometer changes, thereby proportionately altering the charging cycle time t.sub.RC for the charger 110 to raise the charger voltage level V.sub.RC from 0 volts to a predefined reference voltage level V.sub.ref.
The comparator 120 includes a first input, a second input and a first output. The first input is electrically coupled to the first output of the charger 110, which transmits V.sub.RC. The second input is electrically coupled to the reference circuit 115, which transmits V.sub.ref. The first output of the comparator 120 is electrically coupled to both the memory cell ("X1") (not shown) in the positional marker register 160, which corresponds to the X-axis of the analog joystick 105a, and the second input of the charger 110. The positional marker register 160 is a four memory cell register with the first two memory cells (X1) and (Y1) (not shown) representing the X- and Y-axis of the first joystick 105a and the latter two memory cells (X2) and (Y2) (not shown) representing the X- and Y-axis of the second analog joystick 105b.
When the first input of the comparator 120 receives a V.sub.RC voltage level, which matches the V.sub.ref voltage level of the second input, the comparator 120 transmits a match signal to the memory cell (X1) of the positional marker register 160 and to the second input of the charger 110. In the positional marker register 160, the match signal inverts the memory cell (X1) from a "1" logic state to a "0" logic state. With regard to the charger 110, the match signal grounds the charger 110 (e.g. lowers V.sub.RC to approximately 0 volts) by turning on a transistor (not shown), which is electrically coupled between the charger 110 and electrical ground. Once reset, the charger 110 will again recharge V.sub.RC to V.sub.ref, however, with a new charging rate, which is relative to the new physical orientation of the positional grip 103.
The host 180 is electrically coupled to the positional marker register 160. During the continuous recharging of the charger 110 at different charging rates, the host 180 continuously polls each memory cell to detect the moment that the logic state of one of the memory cells is inverted from the "1" to the "0" logic state. When the host 180 detects such a logic state inversion in a memory cell, such as memory cell (X1), the host 180 will record the relative time, which has elapsed since the last time that the memory cell (X1) was inverted to the "0" logic state. The host then sets the memory cell (X1) back to its original "1" logic state and the charger (X1) again begins to raise V.sub.RC from approximately 0 volts to V.sub.ref.
This relative period of time between inversions of the logic state directly correlates to the charging cycle time t.sub.RC for the charging circuit (X1) 101a raising the charging voltage V.sub.RC from approximately 0 volts to V.sub.ref. To calculate the relative position of the positional grip 103 along the X-axis, the host 180 compares this t.sub.RC value with the calibrated t.sub.RC value for the positional grip 103 in a center position t.sub.center, a left-most position t.sub.left, and a right-most position t.sub.right.
This method of calculating the relative position of the positional grip 103, however, requires that the host 180 poll the positional marker register 160 without interruption. If the host 180 is interrupted, the charging cycle time t.sub.RC will become inaccurate, thereby resulting in the host 180 generating incorrect calculations of the relative physical orientation of the positional grip 103.
As operating systems, such as Windows 95, are transformed into preemptive multitasking operating systems, such as Windows NT, which continuously switch between applications, problems associated with interruptions in the continuous polling of the host 180 become inherent. To rectify this problem, a software technique called "spin lock" is used to prevent the operating system from switching to another application until the designated application completes its operation.
This solution to the continuous polling problem, however results in a new difficulty, the reduction of available CPU bandwidth for other applications. Spin lock originally was designed to provide a synchronization mechanism for protecting shared data or resources from simultaneous access by software routines, which are concurrently executed in a preemptive multitasking operating system. When spin lock is used in such a context, CPU bandwidth is partially monopolized for relatively short periods of time (e.g. approximately 25 microseconds). In the continuous polling context, however, spin lock is used to calculate the movements of the positional grip 103 over numerous clock cycles (e.g. periods of time between 500 microseconds-1 millisecond), which is between 20 and 40 times longer than spin lock was designed to operate. Such relatively long periods of time unfortunately result in approximately 5-10% of the overall CPU bandwidth allocation remaining unusable for as long as the host 180 is continuously polling the positional marker register 160.
One attempt to avoid this overuse of CPU bandwidth is to avoid the cause of the problem, the need for the host 180 to continuously poll the positional marker register 160. In place of the conventional analog joystick system 100, a conventional digital joystick system, which relies upon a positional time register to record positional data, is used. Typically, the positional time register is an index register. The digital joystick system includes a digital joystick and a digital joystick interface. This design, however, requires both proprietary software protocols and proprietary hardware. For example, in addition to the digital joystick including potentiometers, the design also must utilize both an analog-to-digital ("A/D") converter and a parallel-to-serial converter. The A/D converter translates the voltage V.sub.p across the potentiometers of the joystick into digital data. The parallel-to-serial converter converts this digital data into a proprietary serial communication protocol, which then is transmitted to the digital joystick interface. To decode the transmitted encoded digital data, the digital joystick interface must rely upon a serial-to-parallel converter. The decoded positional data then is stored in a positional time register, which is accessed without having the host continuously poll.
Even though this system resolves the problems associated with the analog joystick system, the proprietary nature of the digital joystick system still results in at least two disadvantages. First, this alternative proprietary digital design costs more than the conventional analog system 100. Secondly, legacy DOS-based applications, which were programmed to only access positional data from the positional marker register 160 in the analog system 100 will not be able to operate in this digital environment. With positional data only stored in the positional time register, legacy DOS-based software applications will have no means of accessing the positional data.
What is needed is a system and method for interfacing with an analog joystick, which maintains the advantages of the digital joystick system, but without compromising the compatibility with the legacy DOS-based software applications.